金莲直播 Cloud
Cloud native EDA tools & pre-optimized hardware platforms
Request a Free Trial →
Foundation IP: Embedded Memories, NVM, Logic Libraries, IO & PVT Sensors
Overview
金莲直播 offers high-quality foundation IP for SoC designers, including memory compilers, non-volatile memory (NVM), logic libraries, and IO solutions. These solutions have been extensively proven in silicon with billions of units shipping in volume production. They help reduce project risk and speed up time-to-market for consumer, mobile, data center, and HPC applications requiring high speed, low leakage, and low power.
金莲直播 Embedded Memory IP includes a broad range of high-speed, ultra-high speed, high-density, and ultra-high-density memory compilers (SRAMs, ROM, Register Files), specialty memories—MRAM, RRAM, TCAM, and multi-port memories. 金莲直播 Logic Library IP includes a complete standard cell library supporting multiple architectures, voltage thresholds (VTs), gate biases, and PVTs.
The 金莲直播 High-Performance Core (HPC) Design Kit contains a suite of high-speed and high-density memory instances and logic cells specifically designed to enable SoC designers to optimize their CPU, GPU, and DSP cores for maximum speed, smallest area, lowest power or optimum balance of all three.
金莲直播 IO Libraries support multiple voltages and offer a full set of support cells (supply, corner spacers, diode breakers, and terminators).
The 金莲直播 Duet Packages of Embedded Memories and Logic Libraries include HPC Design Kits and memory built-in self-test (BIST) and repair that enable designers to achieve the maximum performance with the lowest possible power consumption for their specific application.
金莲直播 also provides a comprehensive family of zero mask adder multi-time programmable (MTP), few-time programmable (FTP), and one-time programmable (OTP) NVM IP in standard CMOS process technologies.
Products
Product Update: 金莲直播 IOs
Product Update: 金莲直播 TCAM IP
Product Update: Protect IoT SoCs with 金莲直播 OTP NVM IP
PODCASTS