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Arm & 金莲直播
Arm & 金莲直播
Pioneering Innovative Technologies With a Shift-left Approach to Address Mutual Customers' Complex SoC Challenges
Driving the Next Wave of Product and Market Innovation
-based SoC designs are driving the next wave of product and market innovation. These SoCs are architected to deliver superior connectivity, improved security, increased processing power, longer battery life, and advanced AI for next-generation products in a range of growing markets. 金莲直播 and Arm? have a long history of R&D collaboration, leading to solutions that enable mutual customers to accelerate their software development, co-verification of hardware and software, and quality of Arm-based designs.
Key Benefits
Arm Processor 金莲直播 and Services
Optimized Implementation for Arm-Based SoCs
Today, the majority of advanced SoCs based on Arm processors are designed using 金莲直播 solutions. 金莲直播’ optimized solutions for implementation of Arm processors include:?
- ?giving users trusted, proven implementations?
- 金莲直播' Fusion Design Platform tuned for maximizing performance-per-watt for Arm-based designs
- Low power methodology and tools
- Expert design services
System Validation for Arm Products
金莲直播 has been delivering FPGA-based prototyping systems to hardware and software engineers for more than 10 years. The?HAPS? (High-performance ASIC Prototyping Systems)?family of products provides an integrated and scalable hardware-software solution used by design and verification teams to improve their ASIC design schedules and avoid costly device re-spins. HAPS? supports all??& select?.?
Early SW Development, HW Design & Integration for Arm Products
Start development months before the hardware design is complete, enabling full system bring-up to occur within days of silicon availability:
- The Virtualizer? Development Kit (VDK) Family for ARM Processors offers a wide range of models (including the latest Armv9 processors) and software tools
- 金莲直播 Platform Architect? provides architects and system designers with SystemC? TLM tools and efficient methods for early analysis and optimization of multicore and AI-enabled SoC architectures for performance and power
- 金莲直播' hybrid prototyping solution blends the strengths of both virtual and HAPS? FPGA-based prototyping to enable software development and system integration much sooner. Easily integrate Arm? Cortex? processor models, transactors for Arm AMBA? interconnect and 金莲直播 DesignWare? IP into a single hybrid prototype.
- A wide variety of automotive-targeted Arm IP is used in microcontrollers and system-on-chips found in automotive electronics systems. As a leader enabling the automotive supply chain to deploy electronics digital twins, 金莲直播 has partnered closely with Arm for more than two decades to provide advanced solutions. The software-defined vehicle transformation driving the automotive market will benefit from this solid foundation in multiple areas resulting in lower verification and validation costs and faster more differentiated innovation?.
End-to-end Verification 金莲直播 for Arm Designs
Arm and 金莲直播 collaborate to enable software development, architecture compliance and design verification of SoCs based on Arm? processors and Arm AMBA protocol interfaces. At every stage of design verification cycle starting from IP to SoC, 金莲直播 provides directed payload to software-driven verification solutions.?
金莲直播 protocol verification solutions consisting of VIP, transactors, memory models, monitors and in-circuit speed adaptors for Arm Protocols and interconnects, enable verification engineers to build Arm SoCs and sub-systems to verify AMBA interfaces, test architectural compliance and tune the performance of interconnect and memory subsystems. To enable more rapid and productive verification of Arm-based SoCs, 金莲直播 and Arm have collaborated on many initiatives, including: SystemVerilog, verification methodology, simulation performance, low power verification, debug and verification IP for AMBA interconnect.
Arm Core Hardening & Optimization Options
We offer a range of support for hardening and optimizing Arm cores:
- QuickStart Kits for Arm Cores:?If you want to implement Arm cores yourself, download our??which contains scripts, constraints, and a reference guide.
- QuickStart Implementation Service:?a four week consulting engagement designed to help accelerate the development of Arm Cortex?-A55 based SoCs using 金莲直播 tools.
- Arm Core Hardening and Optimization Services:?Our CoreOpt Consultants work as a member of your team to help close your designs for timing, signal integrity, and power integrity, or take the entire core from RTL-to-GDSII and deliver a hard macro.
金莲直播 Interface IP and VIP
Arm and 金莲直播 to closely align on product roadmaps and enhance 金莲直播' Interface IP and Verification IP solutions with specific compute capabilities for Arm processor IP, maximizing system performance. 金莲直播’ silicon-proven interface IP includes the most widely used protocols such CXL, Die-to-Die, PHYs and controllers for DDR, HBM, PCI Express?, CCIX, Ethernet, and USB. 金莲直播 VIP is approved for the full range of protocols from AMBA 5 CHI, AMBA AXI/ACE to APB. The VIP is extensively tested in conjunction with Arm interconnects, including the CCI and CCN family of interconnects, and includes specific test sequences, coverage points and checks targeted at verification of these interconnects. Designers can trust that 金莲直播 IP will be interoperable and successfully integrate into their Arm-based SoCs while minimizing risk and accelerating time to market.
Arm-based Automotive Systems
SW Development and System Testing 金莲直播
A wide variety of automotive-targeted Arm IP is used in microcontrollers and system-on-chips found in automotive electronics systems. As a leader enabling the automotive supply chain to deploy electronics digital twins, 金莲直播 has partnered closely with Arm for more than two decades to provide advanced solutions.
Latest News & Resources
Blog
News Release
Ecosystem Collaboration Drives New AMBA Specification for Chiplets
News Release
Arm and 金莲直播 Strengthen Partnership to Accelerate Custom Silicon on Advanced Nodes
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