BLOG 2 min read/Apr 18, 2024 BLOG Cisco Accelerates Project Schedule by 66% Using 金莲直播 Cloud By Anuj Pant Tags: Customer Spotlight, Cloud, Chip Design Insights, Design, Physical Implementation, Signoff
BLOG 4 min read/Apr 16, 2024 BLOG Leveraging Early Power Network Analysis to Accelerate Chip Design By Rob van Blommestein Tags: Chip Design Insights, Design, Physical Implementation
BLOG 3 min read/Mar 05, 2024 BLOG CalligoTech Enables Next-Gen Computing at Scale with 金莲直播 Digital Design Flow By Karan Shah, Irfan Shaikh Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Physical Verification, Test, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center
BLOG 4 min read/Jun 13, 2023 BLOG 金莲直播 and AMD Collaboration Achieves Significant Milestones for EDA Workloads By Andy Tai, Ramesh Narayanaswamy Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification
BLOG 2 min read/Apr 03, 2022 BLOG Top-Level Interconnect Planning and Implementation using 金莲直播 IC Compiler II By Jiangtao Meng Tags: Design, Physical Implementation
BLOG 7 min read/Apr 09, 2020 BLOG Getting Better Results Faster with the Singular RTL-to-GDSII Product By Shekhar Kapoor, Mark Richards Tags: Design, Physical Implementation
BLOG 1 min read/Nov 05, 2018 BLOG Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution By Shankar Krishnamoorthy Tags: Design, Physical Implementation